The NURBS book
Curves and surfaces for CAGD: a practical guide
Curves and surfaces for CAGD: a practical guide
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
A Unified Architecture for the Computation of B-Spline Curves and Surfaces
IEEE Transactions on Parallel and Distributed Systems
Quart-parametric interpolations for intersecting paths
Computer-Aided Design
The feedrate scheduling of NURBS interpolator for CNC machine tools
Computer-Aided Design
Design of a FPGA-Based NURBS interpolator
ICIRA'11 Proceedings of the 4th international conference on Intelligent Robotics and Applications - Volume Part II
Computers and Industrial Engineering
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Modern motion control adopts NURBS (Non-Uniform Rational B-Spline) interpolation for the purpose of achieving high-speed and high-accuracy performance. However, in conventional control architectures, the computation of the basis functions of a NURBS curve is very time-consuming due to serial computing constraints. In this paper, a novel FPGA (Field Programmable Gate Array) based motion controller utilizing its high-speed parallel computing power is proposed to realize the Cox-de Boor algorithm for second and higher degrees NURBS interpolation. The motion control algorithm is also embedded in the FPGA chip to implement real-time control and NURBS interpolation simultaneously for multi-axis servo systems. The proposed FPGA-based motion controller is capable of performing the Cox-de Boor algorithm and the IIR (Infinite Impulse Response) control algorithm in about 46 clock cycles, as compared to the 1303 clock cycles by the traditional approach. Numerical simulations and experimental tests using an X-Y table verify the outstanding computation performance of the FPGA-based motion controller. The result indicates that shorter sampling time (10 @ms) can be achieved for NURBS interpolation which is highly critical to the success of high-speed and high-accuracy motion control.