Design and optimization of LC oscillators
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
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The paper proposes a voltage-controlled oscillator (VCO) with low phase noise and low power dissipation for IEEE 802.11a. The VCO is implemented by a negative resistance multiple-gated circuit (NRMGC) and a bypass capacitor to achieve the performance. The chip is fabricated with 0.18μm CMOS process. Its measured results show the phase noise of -124.81dBc/Hz at 1MHz offset frequency from the central carrier and the power dissipation of 2.7mW, tuning frequency from 2.167GHz to 2.73GHz, and oscillator signal power from -8.5dBm to -3.87dBm under the test condition of tuning voltage from -0.9V to 0.9V, and supply voltage of 0.9V. The theoretical analysis and design consideration are conducted in details to demonstrate the benefits of the proposed VCO.