PAC duo system power estimation at ESL
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
A portable, efficient inter-core communication scheme for embedded multicore platforms
Journal of Systems Architecture: the EUROMICRO Journal
MCEmu: A Framework for Software Development and Performance Analysis of Multicore Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multi-core system performance prediction and analysis at the ESL
International Journal of Computational Science and Engineering
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The trend towards heterogeneous multi-core integration and higher communication bandwidth drastically increases the complexity of the SoC. Architecture design and system validation become extremely challenging. This paper presents a system-level virtual platform and simulation environment for multi-core system performance profiling and evaluation. At the higher level of abstraction, we implement a fast and high accurate dual DSP virtual platform for multimedia application. The simulation speed of this platform can achieve 100 times faster than RTL and the timing accuracy can maintain above 90%. Based on this virtual platform, the system function and performance analyses can be realized. We propose the performance metrics to analyze dual core system bottleneck. Experiments show that the virtual platform helps the system evaluation and exploration. The virtual platform can assist software and hardware engineers to scrutinize application efficiency and architecture evaluation respectively.