A Benchmark Characterization of the EEMBC Benchmark Suite

Authors:
Jason A. Poovey;Thomas M. Conte;Markus Levy;Shay Gal-On
Affiliations:
Georgia Institute of Technology;Georgia Institute of Technology;EDN Embedded Microprocessor Benchmark Consortium;EDN Embedded Microprocessor Benchmark Consortium
Venue:
IEEE Micro
Year:
2009

Citing 0
Cited 6

Applying frame layout to hardware design in FPGA for seamless support of cross calls in CPU-FPGA coupling architecture

Microprocessors & Microsystems
Creating portable, repeatable, realistic benchmarks for embedded systems and the challenges thereof

Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems
Waveperf: a benchmark generator for performance evaluation

ACM SIGBED Review - 2nd Workshop on Embed With Linux (EWiLi 2012)
mTags: augmenting microkernel messages with lightweight metadata

ACM SIGOPS Operating Systems Review
Memory-centric scheduling for multicore hard real-time systems

Real-Time Systems
Web based multi-platform benchmark program construction in smartphone

Proceedings of the 7th International Conference on Ubiquitous Information Management and Communication

Quantified Score

Hi-index	0.00

Visualization

Abstract

Benchmark consumers expect benchmark suites to be complete, accurate, and consistent, and benchmark scores serve as relative measures of performance. However, it is important to understand how benchmarks stress the processors that they aim to test. This study explores the stress points of the EEMBC embedded benchmark suite using the benchmark characterization technique.