Proceedings of the 45th annual Design Automation Conference
Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Energy efficient many-core processor for recognition and mining using spin-based memory
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Electrothermal analysis of spin-transfer-torque random access memory arrays
ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special issue on memory technologies
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In this paper we propose a methodology for energy efficient Spin-Torque-Transfer Random Access Memory (STTRAM) array design at scaled technology nodes. We present a model to estimate and analyze the energy dissipation of an STTRAM array. The presented model shows the strong dependence of the array energy on the silicon transistor width, word line voltage and row/column organization. Using the array energy model we propose a design methodology for STTRAM arrays which minimizes the energy dissipation while maintaining the required robustness in read and write operations at scaled technologies.