Image Recognition in Analog VLSI with On-Chip Learning

Authors:
Gonzalo Carvajal;Waldo Valenzuela;Miguel Figueroa
Affiliations:
Department of Electrical Engineering, Universidad de Concepción,;Department of Electrical Engineering, Universidad de Concepción,;Department of Electrical Engineering, Universidad de Concepción,
Venue:
ICANN '09 Proceedings of the 19th International Conference on Artificial Neural Networks: Part I
Year:
2009

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Abstract

We present an analog-VLSI neural network for image recognition which features a dimensionality reduction network and a classification stage. We implement local learning rules to train the network on chip or program the coefficients from a computer, while compensating for the negative effects of device mismatch and circuit nonlinearity. Our experimental results show that the circuits perform closely to equivalent software implementations, reaching 87% accuracy for face classification and 89% for handwritten digit classification. The circuit dissipates 20mW and occupies 2.5mm2 of die area in a 0.35μ m CMOS process.