Design and evaluation of a wide-area event notification service
ACM Transactions on Computer Systems (TOCS)
A hybrid systems modeling framework for fast and accurate simulation of data communication networks
SIGMETRICS '03 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Performance by Design: Computer Capacity Planning By Example
Performance by Design: Computer Capacity Planning By Example
An integrated experimental environment for distributed systems and networks
OSDI '02 Proceedings of the 5th symposium on Operating systems design and implementationCopyright restrictions prevent ACM from being able to make the PDFs for this conference available for downloading
OOPSLA '05 Proceedings of the 20th annual ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
IEEE Computer Architecture Letters
RTCSA '06 Proceedings of the 12th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
Opportunities beyond single-core microprocessors
Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
Representative Multiprogram Workloads for Multithreaded Processor Simulation
IISWC '07 Proceedings of the 2007 IEEE 10th International Symposium on Workload Characterization
An optimal fixed-priority assignment algorithm for supporting fault-tolerant hard real-time systems
IEEE Transactions on Computers
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Enterprise distributed real-time and embedded (DRE) systems are increasingly using high-performance computing architectures, such as dual-core architectures, multi-core architectures, and parallel computing architectures, to achieve optimal performance. Performing system integration tests on such architectures in realistic operating environments during early phases of the software lifecycle, i.e. , before complete system integration time, is becoming more critical. This helps distributed system developers and testers evaluate and locate potential performance bottlenecks before they become too costly to locate and rectify. Traditional approaches either (1) rely heavility on simulation techiques or (2) are too low-level and fall outside the domain knowledge distributed system developers and testers. Consequently, it is hard for distributed system developers and testers to produce realistic operating conditions for early integration testing of such systems. This papers provides two contributions to facilitating early system integration testing of enterprise DRE systems. First, it provides a generalized technique for emulating computation intensive workload irrespective of the target architecture. Secondly, this paper illustrates how the emulation technique is used to evaluating different high-performance computing architectures in early phases of the software lifecycle. The technique presented in this paper is empirically and quantitatively evaluated in the context of a representative enterprise DRE system from the domain of shipboard computing environments.