Proceedings of the 38th annual Design Automation Conference
Carry checking/parity prediction adders and ALUs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Biresidue Error-Correcting Codes for Computer Arithmetic
IEEE Transactions on Computers
On Second-Order Fault Analysis Resistance for CRT-RSA Implementations
WISTP '09 Proceedings of the 3rd IFIP WG 11.2 International Workshop on Information Security Theory and Practice. Smart Devices, Pervasive Systems, and Ubiquitous Networks
On the importance of checking cryptographic protocols for faults
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
Fault attacks for CRT based RSA: new attacks, new results and new countermeasures
WISTP'07 Proceedings of the 1st IFIP TC6 /WG8.8 /WG11.2 international conference on Information security theory and practices: smart cards, mobile and ubiquitous computing systems
Robust finite field arithmetic for fault-tolerant public-key cryptography
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
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In the past many coding schemes have been proposed to render arithmetic and logic units fault tolerant. However, most schemes are suited for safety rather than for security applications, i.e. they were not designed to protect against malicious fault injections. Even articles considering an adversary as the source of faults restrict the error-detection discussion to partial fault models.In this article, we investigate the possibilities of an adversary to inject an undetected fault in different coding schemes. In contrast to other works, we analyze the interaction of erroneous operands and operations. Such an analysis yields quite different results than traditional evaluations. These new results show that each of the schemes has serious weaknesses and neither of them can guarantee a universal protection. Thus, a hybrid approach is favorable to counteract fault attacks.