Content aware configurable architecture for H.264/AVC integer motion estimation engine

Authors:
Yiqing Huang;Qin Liu;Takeshi Ikenaga
Affiliations:
Waseda University, Kitakyushu, Fukuoka, Japan;Waseda University, Kitakyushu, Fukuoka, Japan;Waseda University, Kitakyushu, Fukuoka, Japan
Venue:
ICME'09 Proceedings of the 2009 IEEE international conference on Multimedia and Expo
Year:
2009

Citing 3
Cited 0

Overview of the H.264/AVC video coding standard

IEEE Transactions on Circuits and Systems for Video Technology
Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC

IEEE Transactions on Circuits and Systems for Video Technology
Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder

IEEE Transactions on Circuits and Systems for Video Technology

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Abstract

In this paper, we contribute a configurable SAD Tree architecture based on adaptive subsampling scheme. Firstly, by further exploiting the spatial feature, the integer motion estimation process is greatly sped up. Secondly, the conventional partial sum of absolute difference (SAD) based pipeline structure is optimized into configurable SAD oriented way, which enhances the performance and solve the data reuse problem caused by adaptive scheme in the architecture level. Moreover, a cross reuse and compressor tree based circuit level optimization is introduced and 6.56% hardware cost is reduced. Experiments show that our design can averagely achieve 42.23% saving in processing cycles compared with previous design. With 323k gates at about 144.8MHz, our design can achieve real-time encoding of HDTV 1088p@30fps.