Implementation of H.264 on Mobile Device
IEEE Transactions on Consumer Electronics
A novel unrestricted center-biased diamond search algorithm for block motion estimation
IEEE Transactions on Circuits and Systems for Video Technology
Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder
IEEE Transactions on Circuits and Systems for Video Technology
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This paper presents a real-time H.264/AVC baseline profile video encoder. The encoder hardware is implemented using a cost-effective, low-power ADI Blackin-561 DSP and related peripherals for real-time video capturing, coding and streaming. The encoder software is developed using a two-stage pipelining framework for efficient parallel video data encoding. A synchronization mechanism with shared memory semaphores is used to schedule the hardware processes and software procedures to acquire the real-time encoding performance. Techniques for reducing the execution time in both stages are also described in this paper. Performance evaluation results verified that the encoder is capable of performing real-time encoding of CIF-resolution and medium-motion VGA-resolution videos, while maintaining good video quality.