More efficient software implementations of (generalized) DES
Computers and Security
Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis
IEEE Transactions on Computers
High Performance DES Encryption in Virtex(tm) FPGAs Using Jbits(tm)
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
A Flip-Chip Implementation of the Data Encryption Standard (DES)
MCMC '97 Proceedings of the 1997 Conference on IEEE Multi-Chip Module Conference
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A mutual authentication scheme with key agreement for industrial wireless network
Proceedings of the 5th International Conference on Ubiquitous Information Management and Communication
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Supporting high levels of security in wireless networks is a challenging issue because of the specific problems this environment poses; the provided security by small mobile systems, such as PDAs and mobile phones, is often restricted by their limited battery power and their limited processing power. Driven by these restrictions, the designer will have to decide whether to implement the wireless network security schemes in software or to add special purpose hardware units to the system, executing those CPU intensive tasks. This paper demonstrates and compares the Hardware and Software implementations of a number of widely used security applications employed in wireless networks. We measured the total energy consumption for each security algorithm when implemented in reconfigurable hardware devices and we compared it with the total energy consumption of the equivalent software applications. We demonstrate, that the hardware implementations on a state-of-the-art FPGA are significantly faster while they consume three orders of magnitude less power when compared with the software implementations executed on a state-of-the-art hard-core CPU which is embedded in the same FPGA device.