Supervisory control of a class of discrete event processes
SIAM Journal on Control and Optimization
A trace-based compositional proof theory for fault tolerant distributed systems
Theoretical Computer Science - Special issue on dependable parallel computing
Fault tolerance in distributed systems
Fault tolerance in distributed systems
Dependability: Basic Concepts and Terminology
Dependability: Basic Concepts and Terminology
Synthesis of Discrete-Event Controllers Based on the SignalEnvironment
Discrete Event Dynamic Systems
Mode-automata: a new domain-specific construct for the development of safe critical systems
Science of Computer Programming - Special issure on formal methods for industrial critical systems (FMICS 2000)
Model Checking and Fault Tolerance
AMAST '97 Proceedings of the 6th International Conference on Algebraic Methodology and Software Technology
Managing Multi-Mode Tasks with Time Cost and Quality Levels using Optimal Discrete Control Synthesis
ECRTS '02 Proceedings of the 14th Euromicro Conference on Real-Time Systems
Consensus service: a modular approach for building agreement protocols in distributed systems
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Fault-tolerant platforms for automotive safety-critical applications
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Using controller-synthesis techniques to build property-enforcing layers
ESOP'03 Proceedings of the 12th European conference on Programming
Implementing fault-tolerance in real-time programs by automatic program transformations
ACM Transactions on Embedded Computing Systems (TECS)
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Embedded systems require safe design methods based on formal methods, as well as safe execution based on fault-tolerance techniques. We propose a safe design method for safe execution systems: it uses discrete controller synthesis (DCS) to generate a correct reconfiguring system. The properties enforced concern consistent execution, functionality fulfillment (whatever the faults, under some failure hypothesis), and several optimizations. We propose model patterns for a set of periodic tasks, a set of distributed, heterogeneous and fail-silent processors, and an environment model that expresses the potential fault patterns. We outline an implementation of our method, using the Sigali symbolic DCS tool and Mode Automata.