Strongly Code Disjoint Checkers
IEEE Transactions on Computers
Understanding fault-tolerant distributed systems
Communications of the ACM
Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic
DSN '02 Proceedings of the 2002 International Conference on Dependable Systems and Networks
Proceedings of the IEEE International Test Conference
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A formal approach to fault tree synthesis for the analysis of distributed fault tolerant systems
Proceedings of the 5th ACM international conference on Embedded software
Logical reliability of interacting real-time tasks
Proceedings of the conference on Design, automation and test in Europe
Modeling Fault-tolerant Distributed Systems for Discrete Controller Synthesis
Electronic Notes in Theoretical Computer Science (ENTCS)
Robust embedded software design through early analysis of quality faults
Proceedings of the 4th India Software Engineering Conference
Combined architecture and hardening techniques exploration for reliable embedded system design
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Cost-effective safety and fault localization using distributed temporal redundancy
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Tradeoff exploration between reliability, power consumption, and execution time
SAFECOMP'11 Proceedings of the 30th international conference on Computer safety, reliability, and security
MMB&DFT'10 Proceedings of the 15th international GI/ITG conference on Measurement, Modelling, and Evaluation of Computing Systems and Dependability and Fault Tolerance
Time-Constraint-Aware Optimization of Assertions in Embedded Software
Journal of Electronic Testing: Theory and Applications
Reliability and performance optimization of pipelined real-time systems
Journal of Parallel and Distributed Computing
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Fault-tolerant electronic sub-systems are becoming a standard requirement in the automotive industrial sector as electronics becomes pervasive in present cars. We address the issue of fault tolerant chip architectures for automotive applications. We begin by reviewing fault-tolerant architectures commonly used in other industrial domains where fault-tolerant electronics has been a must for a number of years, e.g., the aircraft manufacturing industrial sector. We then proceed to investigate how these architecture could be implemented on a single chip and we compare them with a metric that combines traditional terms such as cost, performance and fault coverage with flexibility, i.e. the ability of adapting to changing requirements and capturing a wide range of applications, an emerging criterion for platform design. Finally, we describe in some details a cost effective dual lock-step platform that can be used as a single fail-operational unit or as two fail-silent channels trading fault-tolerance for performance.