Soft-Error Detection through Software Fault-Tolerance Techniques
DFT '99 Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems
Fault-tolerant platforms for automotive safety-critical applications
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
A Dependability-Driven System-Level Design Approach for Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Low-Cost Hardening of Image Processing Applications Against Soft Errors
DFT '06 Proceedings of the 21st IEEE International Symposium on on Defect and Fault-Tolerance in VLSI Systems
Interactive presentation: Reliability-aware system synthesis
Proceedings of the conference on Design, automation and test in Europe
Reliability-aware Co-synthesis for Embedded Systems
Journal of VLSI Signal Processing Systems
Symbolic voter placement for dependability-aware system synthesis
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analysis and optimization of fault-tolerant embedded systems with hardened processors
Proceedings of the Conference on Design, Automation and Test in Europe
Reliability-Driven System-Level Synthesis of Embedded Systems
DFT '10 Proceedings of the 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems
Transparent recovery from intermittent faults in time-triggered distributed systems
IEEE Transactions on Computers
Fault-Tolerant Distributed Deployment of Embedded Control Software
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper proposes an approach for hardening embedded systems that combines the identification of the most convenient architecture and the set of application-level fault management techniques, fulfilling reliability requirements and maximizing performance. A Design Space Exploration approach is proposed; it extends existing solutions by taking into account different heterogeneous computing resources, thus enriching the traditional scenario of the fixed a-priori architecture. Experimental results on synthetic examples and a real case-study are reported to show the benefits of the approach extended to the architectural resources.