Design & analysis of fault tolerant digital systems
Design & analysis of fault tolerant digital systems
IBM experiments in soft fails in computer electronics (1978–1994)
IBM Journal of Research and Development - Special issue: terrestrial cosmic rays and soft errors
A framework for estimation and minimizing energy dissipation of embedded HW/SW systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
Proceedings of the 6th international workshop on Hardware/software codesign
IEEE Transactions on Computers
DIVA: a reliable substrate for deep submicron microarchitecture design
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Detailed design and evaluation of redundant multithreading alternatives
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Hardware/Software CO-Design: Principles and Practice
Hardware/Software CO-Design: Principles and Practice
Readings in hardware/software co-design
Readings in hardware/software co-design
Synthesis of SEU-tolerant ASICs using concurrent error correction
GLSVLSI '95 Proceedings of the Fifth Great Lakes Symposium on VLSI (GLSVLSI'95)
A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems
IOLTW '02 Proceedings of the Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02)
Reliability Properties Assessment at System Level: A Co-design Framework
IOLTW '01 Proceedings of the Seventh International On-Line Testing Workshop
An ILP Formulation for Reliability-Oriented High-Level Synthesis
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Combined architecture and hardening techniques exploration for reliable embedded system design
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
ACM Transactions on Embedded Computing Systems (TECS)
Energy- and reliability-aware task scheduling onto heterogeneous MPSoC architectures
The Journal of Supercomputing
Cross-Level compositional reliability analysis for embedded systems
SAFECOMP'12 Proceedings of the 31st international conference on Computer Safety, Reliability, and Security
An adaptive approach for online fault management in many-core architectures
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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As technology scales, transient faults have emerged as a key challenge for reliable embedded system design. This paper proposes a design methodology that incorporates reliability into hardware---software co-design paradigm for embedded systems. We introduce an allocation and scheduling algorithm that efficiently handles conditional execution in multi-rate embedded systems, and selectively duplicates critical tasks to detect or correct transient errors, such that the reliability of the system is improved. Two methods are proposed to insert duplicated tasks into the schedule. The improved reliability is achieved by utilizing the otherwise idle computation resources and taking advantage of the overlapping schedule for mutually exclusive tasks in the conditional task graph, such that it incurs no resource or performance penalty.