An experimental evaluation of the assumption of independence in multiversion programming
IEEE Transactions on Software Engineering
Optimal mapping of sequences of data parallel tasks
PPOPP '95 Proceedings of the fifth ACM SIGPLAN symposium on Principles and practice of parallel programming
Optimal latency-throughput tradeoffs for data parallel pipelines
Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures
Fundamentals of fault-tolerant distributed computing in asynchronous environments
ACM Computing Surveys (CSUR)
IEEE Transactions on Parallel and Distributed Systems
Reliable and Precise WCET Determination for a Real-Life Processor
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
ICDCS '95 Proceedings of the 15th International Conference on Distributed Computing Systems
Fault-tolerant platforms for automotive safety-critical applications
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
Basic Concepts and Taxonomy of Dependable and Secure Computing
IEEE Transactions on Dependable and Secure Computing
The effects of energy management on reliability in real-time embedded systems
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Bi-objective scheduling algorithms for optimizing makespan and reliability on heterogeneous systems
Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures
A Delay Composition Theorem for Real-Time Pipelines
ECRTS '07 Proceedings of the 19th Euromicro Conference on Real-Time Systems
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Adaptive Allocation of Independent Tasks to Maximize Throughput
IEEE Transactions on Parallel and Distributed Systems
Mapping pipeline skeletons onto heterogeneous platforms
Journal of Parallel and Distributed Computing
Euro-Par '08 Proceedings of the 14th international Euro-Par conference on Parallel Processing
Reliability versus performance for critical applications
Journal of Parallel and Distributed Computing
Analyzing scheduling with transient failures
Information Processing Letters
Supporting Pipelines in Soft Real-Time Multiprocessor Systems
ECRTS '09 Proceedings of the 2009 21st Euromicro Conference on Real-Time Systems
A Novel Bicriteria Scheduling Heuristics Providing a Guaranteed Global System Failure Rate
IEEE Transactions on Dependable and Secure Computing
RTAS '10 Proceedings of the 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium
A task remapping technique for reliable multi-core embedded systems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Online task remapping strategies for fault-tolerant Network-on-Chip multiprocessors
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Scenario-based design flow for mapping streaming applications onto on-chip many-core systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Lifetime improvement through runtime wear-based task mapping
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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We consider pipelined real-time systems that consist of a chain of tasks executing on a distributed platform. The processing of the tasks is pipelined: each processor executes only one interval of consecutive tasks. We are interested in minimizing both the input-output latency and the period of application mapping. For dependability reasons, we are also interested in maximizing the reliability of the system. We therefore assign several processors to each interval of tasks, so as to increase the reliability of the system. Both processors and communication links are unreliable and subject to transient failures. We assume that the arrival of the failures follows a constant parameter Poisson law, and that the failures are statistically independent events. We study several variants of this multiprocessor mapping problem, with several hypotheses on the target platform (homogeneous/heterogeneous speeds and/or failure rates). We provide NP-hardness complexity results, and optimal mapping algorithms for polynomial problem instances. Efficient heuristics are presented to solve the general case, and experimental results are provided.