Accuracy and fidelity of fast net length estimates

  • Authors:
  • Joseph L. Ganley

  • Affiliations:
  • -

  • Venue:
  • Integration, the VLSI Journal
  • Year:
  • 1997

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Abstract

Most popular tools for VLSI placement rely on some type of local search algorithm to iteratively refine a given placement solution. In such algorithms, it is necessary to evaluate the total amount of routing that a given placement will require. Typially, rectilinear Steiner tree heuristics are used to estimate the routing length of a placement. When evaluating heuristics, researchers typically focus on their ```absolute`` accuracy, i.e., how nearly optimal are their solutions? However, here a more pertinent statistic is their ```relative accuracy``, i.e. how likely is it that a given heuristic will agree with the optimum on which of two instances has the shorter routing? In this paper, we experimentally evaluate four popular net length estimation heuristics, with respect to both their absolute and relative accuracy as well as their speed.