Statistical Richness of Visual Phase Information: Update on Recognizing Persons by Iris Patterns
International Journal of Computer Vision
High Confidence Visual Recognition of Persons by a Test of Statistical Independence
IEEE Transactions on Pattern Analysis and Machine Intelligence
A New Iris Segmentation Method for Recognition
ICPR '04 Proceedings of the Pattern Recognition, 17th International Conference on (ICPR'04) Volume 3 - Volume 03
Iris-based personal authentication using a normalized directional energy feature
AVBPA'03 Proceedings of the 4th international conference on Audio- and video-based biometric person authentication
A human identification technique using images of the iris andwavelet transform
IEEE Transactions on Signal Processing
Performance analysis of iris-based identification system at the matching score level
IEEE Transactions on Information Forensics and Security
A Fast Search Algorithm for a Large Fuzzy Database
IEEE Transactions on Information Forensics and Security
Efficient iris recognition by characterizing key local variations
IEEE Transactions on Image Processing
IEEE Transactions on Circuits and Systems for Video Technology
A review of advances in iris image acquisition system
CCBR'12 Proceedings of the 7th Chinese conference on Biometric Recognition
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Iris recognition is one of the most accurate biometric methods in use today. However, the iris recognition algorithms are currently implemented on general purpose sequential processing systems, such as generic central processing units (CPUs). In this work, we present a more direct and parallel processing alternative using field-programmable gate arrays (FPGAs), offering an opportunity to increase speed and potentially alter the form factor of the resulting system. Within the means of this project, the most time-consuming operations of a modern iris recognition algorithm are deconstructed and directly parallelized. In particular, portions of iris segmentation, template creation, and template matching are parallelized on an FPGA-based system, with a demonstrated speedup of 9.6, 324, and 19 times, respectively, when compared to a state-of-the-art CPU-based version. Furthermore, the parallel algorithm on our FPGA also greatly outperforms our calculated theoretical best Intel CPU design. Finally, on a state-of-the-art FPGA, we conclude that a full implementation of a very fast iris recognition algorithm is more than feasible, providing a potential small form-factor solution.