Design of analog-digital VLSI circuits for telecommunications and signal processing
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
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This paper presents a method to extend linear range of conventional CMOS source-coupled pair with transistor polarised on saturation of strong inversion. The used principle is similar to the principle of source degeneration, but the additional device is horizontally added, in parallel with the input transistors, which overcame the constraints on common mode range and supply voltage and allow low voltage operation. SPICE simulations using 0.35 μm CMOS process and a bias current of 10 μA, show that for less than 1% of transconductance variation, the linear range is up to 0.35 V pp in comparison to 0.1 V pp for source-degenerated pair, and 0.01 V pp for conventional differential pair, under the same biasing current and geometrical dimensions.