Applied introductory circuit analysis for electrical and computer engineers
Applied introductory circuit analysis for electrical and computer engineers
Error bounded Padé approximation via bilinear conformal transformation
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Model order-reduction of RC(L) interconnect including variational analysis
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Guaranteed passive balancing transformations for model order reduction
Proceedings of the 39th annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The advance of high-speed deep-submicron VLSI technology requires chip interconnect and packaging to be modelled by distributed circuits, eventually resulting in large scale linear circuits to be analyzed. This paper presents closed-forms of the state space model and recursive algorithms of the transfer function for even-distributed RC interconnect and its even-length-order (ELO) simplification models. They reveal the characteristics of the ELO models and their relationship to the accurate original model, further lead to a model simplification. The closed-forms with a computation complexity O(1) avoid very large dimension matrix inverse or LU decomposition, and are easy for evaluating a model and its performance. The ELO models are simulated in both time and frequency domains via the closed-forms and recursive algorithms. The results show that extremely high-order RC interconnects can be accurately approximated only by a tenth or higher ELO model. However, when the source and load ports are included, the whole model may be approximated by a low-order ELO model. The results may be applied to VLSI interconnect model reduction and design.