Ultra-low power data storage for sensor networks
Proceedings of the 5th international conference on Information processing in sensor networks
The Behavior Analysis of Flash-Memory Storage Systems
ISORC '08 Proceedings of the 2008 11th IEEE Symposium on Object Oriented Real-Time Distributed Computing
Power and performance characteristics of USB flash drives
WOWMOM '08 Proceedings of the 2008 International Symposium on a World of Wireless, Mobile and Multimedia Networks
Page-level log mapping: from many-to-many mapping to one-to-one mapping
DASFAA'11 Proceedings of the 16th international conference on Database systems for advanced applications
GANGRENE: exploring the mortality of flash memory
HotSec'12 Proceedings of the 7th USENIX conference on Hot Topics in Security
EuroGP'13 Proceedings of the 16th European conference on Genetic Programming
Estimating MLC NAND flash endurance: a genetic programming based symbolic regression application
Proceedings of the 15th annual conference on Genetic and evolutionary computation
Product code schemes for error correction in MLC NAND flash memories
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
International Journal of Computational Intelligence Studies
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Reports of NAND ash device testing in the literature have for the most part been limited to examination of circuit-level parameters on raw ash chips or prototypes, and system-level parameters on entire storage subsystems. However, there has been little examination of system-level parameters of raw devices, such as mean latency and endurance values. We report the results of such tests on a variety of devices. Read, program, and erase latency were found to align closely with manufacturer's specified \typical" values in almost all cases. Program/erase endurance, however, was found to exceed specified minimum values, often by as much as a factor of 100. In addition significant performance changes were found with wear. These changes may be used to track wear, and in addition have significant implications for system performance over the lifespan of a device. Finally, random write patterns which incur performance penalties on current ash-based memory systems were found to incur no overhead on the devices themselves.