Design Considerations in Boeing 777 Fly-By-Wire Computers
HASE '98 The 3rd IEEE International Symposium on High-Assurance Systems Engineering
Detecting Processor Hardware Faults by Means of Automatically Generated Virtual Duplex Systems
DSN '02 Proceedings of the 2002 International Conference on Dependable Systems and Networks
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
Software-Implemented Hardware Fault Tolerance
Software-Implemented Hardware Fault Tolerance
An Introduction to GCC
Runtime asynchronous fault tolerance via speculation
Proceedings of the Tenth International Symposium on Code Generation and Optimization
Time-Constraint-Aware Optimization of Assertions in Embedded Software
Journal of Electronic Testing: Theory and Applications
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Software in dependable systems must be able to tolerate or detect faults in the underlying infrastructure, such as the hardware. This paper presents a cost efficient automated method how register faults in the microprocessor can be detected during execution. This is done with the help of using compiler options to generate diverse binaries. The efficacy of this approach has been analyzed with the help of a CPU emulator, which was modified exactly for this purpose. The promising results show, that by using this approach, it is possible to automatically detect the vast majority of the injected register faults. In our simulations, two diverse versions have - despite of experiencing the same fault during execution - never delivered the same incorrect result, so we could detect all injected faults.