Analysis of single-ended CMOS differential amplifier with active load: considering nonidealities in the circuit

Authors:
K. K. Abdul Salam
Affiliations:
College of Engineering Munnar, Kerala, India
Venue:
Proceedings of the International Conference and Workshop on Emerging Trends in Technology
Year:
2010

Citing 4
Cited 0

Analysis and Design of Analog Integrated Circuits

Analysis and Design of Analog Integrated Circuits
Design of Analog CMOS Integrated Circuits

Design of Analog CMOS Integrated Circuits
An approach to the analysis of the CMOS differential stage with active load and single-ended output

IEEE Transactions on Education
The CMOS differential stage with active load intuitively demonstrates the unequal split of the differential input Voltage

IEEE Transactions on Education

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Abstract

The single-ended CMOS differential amplifier with active load is one of the most popular circuits used in analog and mixed signal circuits for signal processing applications, due to its good performance in terms of the common-mode rejection and voltage gain, combined with an extremely simple circuit structure, which performs directly differential to single-ended conversion. In this paper, the oversimplified assumptions made in the analysis of the circuit in leading reference books were considered and an initiative is taken to study the effects in gain and delay due to the non-idealities in the circuit. A new approach to analyze the circuit, considering the non-idealities, is presented in this paper.