Comparison of modeling techniques in circuit variability analysis
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
Efficient memory repair using cache-based redundancy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Methods for fault tolerance in networks-on-chip
ACM Computing Surveys (CSUR)
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Editor's note:Process variability has become a critical issue in scaled CMOS design. This article provides a comprehensive view on the predominant variation sources in sub–90-nm devices, their impact on device and circuit performance, and various modeling approaches for statistical circuit analysis.—Yu Cao, Arizona State University