3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections
IBM Journal of Research and Development
| Hi-index | 2.88 |
Confined VLS growth is proposed to produce single crystalline silicon (c-Si) film over an amorphous oxide layer, without crystalline seed. The guided growth of Si nanoribbons (NRs) is successfully demonstrated and characterized using several electron microscopy techniques. First, VLS growth is studied on a plane substrate covered by gold (Au) patterned parallelepipedic ingots of several dimensions. In this unconstrained growth condition, c-Si nanowires (NWs) are synthesized with controlled position but random orientation on an amorphous substrate. Subsequently, it is demonstrated that VLS growth in the spatial confinement of a cavity produces nanometer-thick c-Si blades over a micron area scale with well-controlled localization. The nature of grown silicon layers is characterized by Scanning Electron Microscopy (SEM), Electron Backscattered Diffraction (EBSD) and Scanning Transmission Electron Microscopy (STEM) to analyze its crystallinity and to check the impact of the confining cavity walls on the purity of grown silicon. This technique opens the way for the fabrication of stacked active silicon layers isolated from each other useful for 3D CMOS integration.