Signatures in transactional memory systems

• Authors: Mark D. Hill;Luke Yen
• Venue: Signatures in transactional memory systems
• Year: 2009

Transactional memory (TM) is a parallel programming paradigm that seeks to ease problems with lock-based parallel programming through the use of novel language-level constructs to denote transactions. We focus on hardware implementations (HTMs) because they offer the best performance. An ideal HTM design should: (1) Allow transactions of arbitrary size and time and (2) Minimize changes to existing processor cores and systems. In general, HTMs that support these properties have the ability to virtualize transactions. This dissertation contributes to the design and analysis of a HTM with these properties. First, we contribute LogTM Signature Edition (LogTM-SE). LogTM-SE synergistically combines LogTM's log for version management (i.e., mechanisms for tracking old and new data values) with an imprecise hardware mechanism called signatures for conflict detection (i.e., mechanisms for detecting conflicts amongst concurrent transactions). LogTM-SE virtualizes transactions through the interactions of simple hardware with software, at the cost of performance degradations due to spurious signature conflicts. Second, we contribute Notary, a coupling of ideas to enhance signatures. We propose Page-BlockXOR, a lower-cost hash function that performs similar to the best previously proposed hashing function, H3. Additionally, signatures may incur conflicts caused by the insertion of thread-private memory references. We introduce privatization techniques that include the removal of stack references from signatures and a heap-based interface to differentiate private and shared objects. Third, we contribute TMProf, a new performance debugging framework for HTM systems. The additional critical-section parallelism enabled by TM makes it harder for the HTM designer (and TM programmer) to understand the performance impact of different HTM designs. TMProf accounts for the frequency and overheads of common HTM events using a set of hardware performance counters implemented in each processor core. We propose two implementations of TMProf, base and extended, and show its utility on two HTM designs. Fourth, we contribute six new extensions to signature designs that seek to reduce signature false conflicts. We show that optimizing signatures for spatial locality is the most promising extension for future research.