A practical OpenMP compiler for system on chips

Authors:
Feng Liu;Vipin Chaudhary
Affiliations:
Department of Electrical & Computer Engineering, WSU;Institute for Scientific Computing, WSU and Cradle Technologies, Inc.
Venue:
WOMPAT'03 Proceedings of the OpenMP applications and tools 2003 international conference on OpenMP shared memory parallel programming
Year:
2003

Citing 3
Cited 9

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Abstract

With the advent of modern System-on-Chip (SOC) design, the integration of multiple-processors into one die has become the trend. By far there are no standard programming paradigms for SOCs or heterogeneous chip multiprocessors. Users are required to write complex assembly language and/or C programs for SOCs. Developing a standard programming model for this new parallel architecture is necessary. In this paper, we propose a practical OpenMP compiler for SOCs, especially targeting 3SoC. We also present our solutions to extend OpenMP directives to incorporate advanced architectural features of SOCs. Preliminary performance evaluation shows scalable speedup using different types of processors and effectiveness of performance improvement through optimization.