Statecharts: A visual formalism for complex systems
Science of Computer Programming
Real-time object-oriented modeling
Real-time object-oriented modeling
On the power of bounded concurrency I: finite automata
Journal of the ACM (JACM)
Experiences Using Lightweight Formal Methods for Requirements Modeling
IEEE Transactions on Software Engineering
The Temporal Rover and the ATG Rover
Proceedings of the 7th International SPIN Workshop on SPIN Model Checking and Software Verification
HW/SW Cosynthesis Using Statecharts and Symbolic Timing Diagrams
RSP '98 Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping
Equivalence Checking of Two Statechart Specifications
RSP '00 Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000)
Verification of Timing Properties in Rapid System Prototyping
RSP '03 Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP'03)
Verification of UML-Based Real-Time System Designs by Means of cTLA
ISORC '00 Proceedings of the Third IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
An Overview of the Runtime Verification Tool Java PathExplorer
Formal Methods in System Design
A clean slate 4D approach to network control and management
ACM SIGCOMM Computer Communication Review
Creation and Validation of Embedded Assertion Statecharts
RSP '06 Proceedings of the Seventeenth IEEE International Workshop on Rapid System Prototyping
Modeling and Verification Using UML Statecharts: A Working Guide to Reactive System Design, Runtime Monitoring and Execution-based Model Checking
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Checking the correspondence between UML models and implementation
RV'10 Proceedings of the First international conference on Runtime verification
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There is an increasing need for today's autonomous systems to collaborate in real-time over wireless networks. These systems need to interact closely with other autonomous systems and function under tight timing and control constraints. This paper concerns with the modeling and quality assurance of the timing behavior of such network embedded systems. It builds upon our previous work on run-time model checking of temporal correctness properties and automatic white-box testing using run-time assertion checking. This paper presents an architecture for the network embedded systems, a lightweight formal method that is based on formal statechart assertions for the design and development of networked embedded systems, and a process of using run-time monitoring and verification, in tandem with modeling and simulation, to study the timing requirements of complex systems early in the design process.