Communicating sequential processes
Communicating sequential processes
Protocol Verification as a Hardware Design Aid
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
OPEN/CÆSAR: An OPen Software Architecture for Verification, Simulation, and Testing
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Bogor: an extensible and highly-modular software model checking framework
Proceedings of the 9th European software engineering conference held jointly with 11th ACM SIGSOFT international symposium on Foundations of software engineering
Distributed verification: exploring the power of raw computing power
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
"To store or not to store" reloaded: reclaiming memory on demand
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
A Database Approach to Distributed State Space Generation
Electronic Notes in Theoretical Computer Science (ENTCS)
Symbolic Reachability for Process Algebras with Recursive Data Types
Proceedings of the 5th international colloquium on Theoretical Aspects of Computing
Model checking of software for microcontrollers
ACM Transactions on Embedded Computing Systems (TECS)
Embedded network protocols for mobile devices
FMICS'10 Proceedings of the 15th international conference on Formal methods for industrial critical systems
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
Boosting multi-core reachability performance with shared hash tables
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
LTSMIN: distributed and symbolic reachability
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
SpinS: Extending LTSmin with Promela through SpinJa
Electronic Notes in Theoretical Computer Science (ENTCS)
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The semantics of modelling languages are not always specified in a precise and formal way, and their rather complex underlying models make it a non-trivial exercise to reuse them in newly developed tools. We report on experiments with a virtual machine-based approach for state space generation. The virtual machine's (VM) byte-code language is straightforwardly implementable, facilitates reuse and makes it an adequate target for translation of higher-level languages like the SPIN model checker's Promela, or even C. As added value, it provides efficiently executable operational semantics for modelling languages. Several tools have been built on top of the VM implementation we developed, to evaluate the benefits of the proposed approach.