A pipelined 8×8 2-D forward DCT hardware architecture for H.264/AVC high profile encoder

Authors:
Thaísa Leal da Silva;Cláudio Machado Diniz;João Alberto Vortmann;Luciano Volcan Agostini;Altamiro Amadeu Susin;Sergio Bampi
Affiliations:
Federal University of Rio Grande do Sul, Porto Alegre, RS, Brazil;Federal University of Rio Grande do Sul, Porto Alegre, RS, Brazil;Federal University of Pelotas, Pelotas, RS, Brazil;Federal University of Pelotas, Pelotas, RS, Brazil;Federal University of Rio Grande do Sul, Porto Alegre, RS, Brazil;Federal University of Rio Grande do Sul, Porto Alegre, RS, Brazil
Venue:
PSIVT'07 Proceedings of the 2nd Pacific Rim conference on Advances in image and video technology
Year:
2007

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Abstract

This paper presents the hardware design of an 8×8 bidimensional Forward Discrete Cosine Transform used in the high profiles of the H.264/AVC video coding standard. The designed DCT is computed in a separate way as two 1-D transforms. It uses only add and shift operations, avoiding multiplications. The architecture contains one datapath for each 1-D DCT with a transpose buffer between them. The complete architecture was synthesized to Xilinx Virtex II - Pro and Altera Stratix II FPGAs and to TSMC 0.35µm standard-cells technology. The synthesis results show that the 2-D DCT transform architecture reached the necessary throughput to encode high definition videos in real-time when considering all target technologies.