A Theoretical DPA-Based Cryptanalysis of the NESSIE Candidates FLASH and SFLASH
ISC '01 Proceedings of the 4th International Conference on Information Security
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Side channel attacks on message authentication codes
ESAS'05 Proceedings of the Second European conference on Security and Privacy in Ad-Hoc and Sensor Networks
Improving SHA-2 hardware implementations
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Successfully attacking masked AES hardware implementations
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Side channel attacks against HMACs based on block-cipher based hash functions
ACISP'06 Proceedings of the 11th Australasian conference on Information Security and Privacy
Secure Implementation of the Stern Authentication and Signature Schemes for Low-Resource Devices
CARDIS '08 Proceedings of the 8th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
Side Channel Analysis of Some Hash Based MACs: A Response to SHA-3 Requirements
ICICS '08 Proceedings of the 10th International Conference on Information and Communications Security
Isolated WDDL: A Hiding Countermeasure for Differential Power Analysis on FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Disappearing Cryptography: Information Hiding: Steganography & Watermarking
Disappearing Cryptography: Information Hiding: Steganography & Watermarking
Practical Electromagnetic Template Attack on HMAC
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Side-channel analysis of six SHA-3 candidates
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
An evaluation of hash functions on a power analysis resistant processor architecture
WISTP'11 Proceedings of the 5th IFIP WG 11.2 international conference on Information security theory and practice: security and privacy of mobile devices in wireless communication
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The HMAC algorithm is widely used to provide authentication and message integrity to digital communications. However, if the HMAC algorithm is implemented in embedded hardware, it is vulnerable to side-channel attacks. In this paper, we describe a DPA attack strategy for the HMAC algorithm, based on the SHA-2 hash function family. Using an implementation on a commercial FPGA board, we show that such attacks are practical in reality. In addition, we present a masked implementation of the algorithm, which is designed to counteract first-order DPA attacks.