System-on-chip beyond the nanometer wall
Proceedings of the 40th annual Design Automation Conference
NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip
IEEE Transactions on Parallel and Distributed Systems
Hybrid image classification and parameter selection using a shared memory parallel algorithm
Computers & Geosciences
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The recent trends in processor architecture show that parallelprocessing is moving into new areas of computing in the form ofmany-core desktop processors and multi-processor system-on-chip. Thismeans that parallel processing is required in application areas that traditionallyhave not used parallel programs. This paper investigates parallelismand scalability of an embedded image processing application. Themajor challenges faced when parallelizing the application were to extractenough parallelism from the application and to reduce load imbalance.The application has limited immediately available parallelism. It is difficultto further extract parallelism since the application has small datasets and parallelization overhead is relatively high. There is also a fairamount of load imbalance which is made worse by a non-uniform memorylatency. Even so, we show that with some tuning relative speedupsin excess of 9 on a 16 CPU system can be reached.