Evolving and analysing "useful" redundant logic

Authors:
Asbjoern Djupdal;Pauline C. Haddow
Affiliations:
CRAB Lab, Department of Computer and Information Science, Norwegian University of Science and Technology;CRAB Lab, Department of Computer and Information Science, Norwegian University of Science and Technology
Venue:
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
Year:
2007

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Abstract

Fault Tolerance is an increasing challenge for integrated circuits due to semiconductor technology scaling. This paper looks at how artificial evolution may be tuned to the creation of novel redundancy structures which may be applied to meet this challenge. An experimental setup and results for creating "useful" redundant structures is presented.