Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Maude: specification and programming in rewriting logic
Theoretical Computer Science - Rewriting logic and its applications
Faster Proof Checking in the Edinburgh Logical Framework
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
Lightweight integration of the Ergo theorem prover inside a proof assistant
Proceedings of the second workshop on Automated formal methods
Cooperating Theorem Provers: A Case Study Combining HOL-Light and CVC Lite
Electronic Notes in Theoretical Computer Science (ENTCS)
Translation of resolution proofs into short first-order proofs without choice axioms
Information and Computation - Special issue: 19th international conference on automated deduction (CADE-19)
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Don't care words with an application to the automata-based approach for real addition
Formal Methods in System Design
Proceedings of the 3rd workshop on Programming languages meets program verification
SMT '08/BPR '08 Proceedings of the Joint Workshops of the 6th International Workshop on Satisfiability Modulo Theories and 1st International Workshop on Bit-Precise Reasoning
Industrial-strength certified SAT solving through verified SAT proof checking
ICTAC'10 Proceedings of the 7th International colloquium conference on Theoretical aspects of computing
A Framework for Certified Boolean Branch-and-Bound Optimization
Journal of Automated Reasoning
Self-certification: bootstrapping certified typecheckers in F* with Coq
POPL '12 Proceedings of the 39th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
versat: a verified modern SAT solver
VMCAI'12 Proceedings of the 13th international conference on Verification, Model Checking, and Abstract Interpretation
Generating Invariant-Based Certificates for Embedded Systems
ACM Transactions on Embedded Computing Systems (TECS)
SMT proof checking using a logical framework
Formal Methods in System Design
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Modern Satisfiability Modulo Theories (SMT) solvers are used in a wide variety of software and hardware verification applications. Proof producing SMT solvers are very desirable as they increase confidence in the solver and ease debugging/profiling, while allowing for scenarios like Proof-Carrying Code (PCC). However, the size of typical proofs generated by SMT solvers poses a problem for the existing systems, up to the point where proof checking consumes orders of magnitude more computer resources than proof generation. In this paper we show how this problem can be addressed using a simple term rewriting formalism, which is used to encode proofs in a natural deduction style. We formally prove soundness of our rules and evaluate an implementation of the term rewriting engine on a set of proofs generated from industrial benchmarks. The modest memory and CPU time requirements of the implementation allow for proof checking even on a small PDA device, paving a way for PCC on such devices.