Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Handbook of theoretical computer science (vol. B)
Presburger arithmetic with unary predicates is P11 complete
Journal of Symbolic Logic
Safe BDD minimization using don't cares
DAC '97 Proceedings of the 34th annual Design Automation Conference
Mixed real-integer linear quantifier elimination
ISSAC '99 Proceedings of the 1999 international symposium on Symbolic and algebraic computation
Symbolic model checking with rich assertional languages
Theoretical Computer Science
Weak alternating automata are not that weak
ACM Transactions on Computational Logic (TOCL)
Circuit-based Boolean Reasoning
Proceedings of the 38th annual Design Automation Conference
Efficient minimization of deterministic weak &ohgr;-automata
Information Processing Letters
Symbolic Model Checking
Introduction to Algorithms
HYTECH: The Cornell HYbrid TECHnology Tool
Hybrid Systems II
Verifying Systems with Infinite but Regular State Spaces
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
An Improved Reachability Analysis Method for Strongly Linear Hybrid Systems (Extended Abstract)
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Automatic Presentations of Structures
LCC '94 Selected Papers from the International Workshop on Logical and Computational Complexity
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Counting the solutions of Presburger equations without enumerating them
Theoretical Computer Science - Implementation and application automata
Simplify: a theorem prover for program checking
Journal of the ACM (JACM)
An effective decision procedure for linear arithmetic over the integers and reals
ACM Transactions on Computational Logic (TOCL)
Introduction to Automata Theory, Languages, and Computation (3rd Edition)
Introduction to Automata Theory, Languages, and Computation (3rd Edition)
SMT '08/BPR '08 Proceedings of the Joint Workshops of the 6th International Workshop on Satisfiability Modulo Theories and 1st International Workshop on Bit-Precise Reasoning
CAV'07 Proceedings of the 19th international conference on Computer aided verification
LIRA: handling constraints of linear arithmetics over the integers and the reals
CAV'07 Proceedings of the 19th international conference on Computer aided verification
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
Isabelle/HOL: a proof assistant for higher-order logic
Isabelle/HOL: a proof assistant for higher-order logic
Rocket-fast proof checking for SMT solvers
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
The power of hybrid acceleration
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Verifying mixed real-integer quantifier elimination
IJCAR'06 Proceedings of the Third international joint conference on Automated Reasoning
Action language verifier, extended
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
PHAVer: algorithmic verification of hybrid systems past hytech
HSCC'05 Proceedings of the 8th international conference on Hybrid Systems: computation and control
A BDD-Like implementation of an automata package
CIAA'04 Proceedings of the 9th international conference on Implementation and Application of Automata
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Automata have proved to be a useful tool in infinite-state model checking, since they can represent infinite sets of integers and reals. However, analogous to the use of binary decision diagrams (bdds) to represent finite sets, the sizes of the automata are an obstacle in the automata-based set representation. In this article, we generalize the notion of "don't cares" for bdds to word languages as a means to reduce the automata sizes. We show that the minimal weak deterministic Büchi automaton (wdba) with respect to a given don't care set, under certain restrictions, is uniquely determined and can be efficiently constructed. We apply don't cares to improve the efficiency of a decision procedure for the first-order logic over the mixed linear arithmetic over the integers and the reals based on wdbas.