A hardware architecture for real-time object detection using depth and edge information
ACM Transactions on Embedded Computing Systems (TECS)
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This paper presents the implementation of a face detection algorithm on FPGA for an eye mouse control system. An improved algorithm of skin color module and binary image projection is used to ensure real-time detection. The system is based on a hardware/software co-design, which consists of a dedicated hardware accelerator that solves the parts of the algorithm with higher computational cost and an embedded microprocessor that manages the control process and executes the rest of the algorithm. Several optimization methods have been accomplished to enhance performance. The system has been implemented on an Altera Cyclone II FPGA using a Nios embedded soft-core processor and it is benchmarked against a software implementation. It is demonstrated that a 640脳480 pixel image can be analyzed in 96ms with a clock frequency of 100MHz.