ACM Transactions on Programming Languages and Systems (TOPLAS)
SPAA '89 Proceedings of the first annual ACM symposium on Parallel algorithms and architectures
Scans as Primitive Parallel Operations
IEEE Transactions on Computers
Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
Design and Evaluation of the Rollback Chip: Special Purpose Hardware for Time Warp
IEEE Transactions on Computers
The network architecture of the Connection Machine CM-5 (extended abstract)
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
Design and performance analysis of hardware support for parallel simulations
Journal of Parallel and Distributed Computing - Special issue on parallel and discrete event simulation
Making parallel simulations go fast
WSC '92 Proceedings of the 24th conference on Winter simulation
A spectrum of options for parallel simulation
WSC '88 Proceedings of the 20th conference on Winter simulation
Hardware Support for Parallel Discrete Event Simulations
Hardware Support for Parallel Discrete Event Simulations
A unified framework for conservative and optimistic distributed simulation
PADS '94 Proceedings of the eighth workshop on Parallel and distributed simulation
Global Virtual Time and distributed synchronization
PADS '95 Proceedings of the ninth workshop on Parallel and distributed simulation
Adaptive algorithms vs. Time Warp: an analytical comparison
WSC '95 Proceedings of the 27th conference on Winter simulation
ACM Transactions on Modeling and Computer Simulation (TOMACS) - Special issue on modeling and analysis of stochastic systems
Seven-O'Clock: A New Distributed GVT Algorithm Using Network Atomic Operations
Proceedings of the 19th Workshop on Principles of Advanced and Distributed Simulation
Scalable Time Warp on Blue Gene Supercomputers
PADS '09 Proceedings of the 2009 ACM/IEEE/SCS 23rd Workshop on Principles of Advanced and Distributed Simulation
A use of matrix with GVT computation in optimistic time warp algorithm for parallel simulation
Proceedings of the 15th Communications and Networking Simulation Symposium
On deciding between conservative and optimistic approaches on massively parallel platforms
Proceedings of the Winter Simulation Conference
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A hardware-based framework which supports a wide range of parallel discrete event synchronization protocols has been proposed in [Reyn92]. This framework offloads all synchronization activity from the host processors and host communication network in the system. The underlying hardware computes results of global, binary associative operations, or global reductions. In this paper we present results of simulations that strongly suggest the need for a next-generation reduction network which computes and disseminates results of target-specific reductions to support both aggressive and non-aggressive parallel discrete event simulations. Target-specific reductions allow a logical process to receive synchronization information only from those logical processes which may have a direct or indirect impact on its performance.