A low-cost memory architecture with NAND XIP for mobile embedded systems
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Energy-aware demand paging on NAND flash-based embedded storages
Proceedings of the 2004 international symposium on Low power electronics and design
CFLRU: a replacement algorithm for flash memory
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Storage alternatives for mobile computers
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Improvement of space utilization in NAND flash memory storages
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Clean first or dirty first?: a cost-aware self-adaptive buffer replacement policy
Proceedings of the Fourteenth International Database Engineering & Applications Symposium
Hybrid storage with disk based write cache
DASFAA'11 Proceedings of the 16th international conference on Database systems for advanced applications
AD-LRU: An efficient buffer replacement algorithm for flash-based databases
Data & Knowledge Engineering
Flash-Aware Buffer Management for Database Systems
International Journal of Knowledge-Based Organizations
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This paper presents new page replacement algorithms for NAND flash memory, called CFLRU/C, CFLRU/E, and DL-CFLRU/E. The algorithms aim at reducing the number of erase operations and improving the wear-leveling degree of flash memory. In the CFLRU/C and CFLRU/E algorithms, the least recently used clean page is selected as the victim within the pre-specified window of the LRU list. If there is no clean page within the window, CFLRU/C evicts the dirty page with the lowest access frequency while CFLRU/E evicts the dirty page with the lowest block erase count. DL-CFLRU/E maintains two LRU lists called the clean page list and the dirty page list, and first evicts a page from the clean page list. If there is no clean page in the clean page list, DLCFLRU/E evicts the dirty page with the lowest block erase count within the window of the dirty page list. Experiments through simulation studies show that the proposed algorithms reduce the number of erase operations and improve the wear-leveling degree of flash memory compared to LRU and CFLRU.