Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Reasoning about networks with many identical finite-state processes
PODC '86 Proceedings of the fifth annual ACM symposium on Principles of distributed computing
Avoiding the state explosion problem in temporal logic model checking
PODC '87 Proceedings of the sixth annual ACM Symposium on Principles of distributed computing
A structural induction theorem for processes
Proceedings of the eighth annual ACM Symposium on Principles of distributed computing
Verifying properties of large sets of processes with network invariants
Proceedings of the international workshop on Automatic verification methods for finite state systems
Reasoning about systems with many processes
Journal of the ACM (JACM)
Constructing compact models of concurrent Java programs
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Well-structured transition systems everywhere!
Theoretical Computer Science
Towards the Automated Verification of Multithreaded Java Programs
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Constraint-Based Model Checking for Parameterized Synchronous Systems
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Automatic Verification of Parameterized Synchronous Systems (Extended Abstract)
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Reducing Model Checking of the Many to the Few
CADE-17 Proceedings of the 17th International Conference on Automated Deduction
General decidability theorems for infinite-state systems
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
On Model Checking for Non-Deterministic Infinite-State Systems
LICS '98 Proceedings of the 13th Annual IEEE Symposium on Logic in Computer Science
On the Verification of Broadcast Protocols
LICS '99 Proceedings of the 14th Annual IEEE Symposium on Logic in Computer Science
Verification of parametric concurrent systems with prioritised FIFO resource management
Formal Methods in System Design
From Many Places to Few: Automatic Abstraction Refinement for Petri Nets
Fundamenta Informaticae - PETRI NETS 2007
Journal of Computer and System Sciences
Attacking the dimensionality problem of parameterized systems via bounded reachability graphs
FSEN'11 Proceedings of the 4th IPM international conference on Fundamentals of Software Engineering
Future Generation Computer Systems
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The features in multi-threaded programs, such as recursion, dynamic creation and communication, pose a great challenge to formal verification. A widely adopted strategy is to verify tentatively a system with a smaller size, by limiting the depth of recursion or the number of replicated processes, to find errors without ensuring the full correctness. The model checking of parameterized systems, a parametric infinite family of systems, is to decide if a property holds in every size instance. There has been a quest for finding cut-offs for the verification of parameterized systems. The basic idea is to find a cut-off on the number of replicated processes or on the maximum length of paths needed to prove a property, standing a chance of improving verification efficiency substantially if one can come up with small or modest cut-offs. In this paper, a novel approach, called Forward Bounded Reachability Analysis (FBRA), based upon the cut-off on the maximum lengths of paths is proposed for the verification of parameterized systems. Experimental results show that verification efficiency has been significantly improved as a result of the introduction of our new cut-offs.