Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Reasoning about systems with many processes
Journal of the ACM (JACM)
Well-structured transition systems everywhere!
Theoretical Computer Science
Symbolic Representation of Upward-Closed Sets
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Verification of Systems with an Infinite State Space
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
Constraint-Based Model Checking for Parameterized Synchronous Systems
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
Attacking Symbolic State Explosion
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Constraint-Based Analysis of Broadcast Protocols
CSL '99 Proceedings of the 13th International Workshop and 8th Annual Conference of the EACSL on Computer Science Logic
General decidability theorems for infinite-state systems
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
On Model Checking for Non-Deterministic Infinite-State Systems
LICS '98 Proceedings of the 13th Annual IEEE Symposium on Logic in Computer Science
On the Verification of Broadcast Protocols
LICS '99 Proceedings of the 14th Annual IEEE Symposium on Logic in Computer Science
Constraint-Based Verification of Parameterized Cache Coherence Protocols
Formal Methods in System Design
Flow analysis for verifying properties of concurrent software systems
ACM Transactions on Software Engineering and Methodology (TOSEM)
Controlling factors in evaluating path-sensitive error detection techniques
Proceedings of the 14th ACM SIGSOFT international symposium on Foundations of software engineering
Symbolic Counter Abstraction for Concurrent Software
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
A New Approach to Upward-Closed Set Backward Reachability Analysis
Electronic Notes in Theoretical Computer Science (ENTCS)
A cut-off approach for bounded verification of parameterized systems
Proceedings of the 32nd ACM/IEEE International Conference on Software Engineering - Volume 1
Model checking and abstraction to the aid of parameterized systems (a survey)
Computer Languages, Systems and Structures
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Parameterized systems are systems that involve numerous instantiations of finite-state processes, and depend on parameters which define their size. The verification of parameterized systems is to decide if a property holds in its every size instance, essentially a problem with an infinite state space, and thus poses a great challenge to the community. Starting with a set of undesired states represented by an upward-closed set, the backward reachability analysis will always terminate because of the well-quasi-orderingness. As a result, backward reachability analysis has been widely used in the verification of parameterized systems. However, many existing approaches are facing with the dimensionality problem, which describes the phenomenon that the memory used for storing the symbolic state space grows extremely fast when the number of states of the finite-state process increases, making the verification rather inefficient. Based on bounded backward reachability graphs, a novel abstraction for parameterized systems, we have developed an approach for building abstractions with incrementally increased dimensions and thus improving the precision until a property is proven or a counterexample is detected. The experiments show that the verification efficiencies have been significantly improved because conclusive results tend to be drawn on abstractions with much lower dimensions.