ParaLearn: a massively parallel, scalable system for learning interaction networks on FPGAs

  • Authors:
  • Narges Bani Asadi;Christopher W. Fletcher;Greg Gibeling;Eric N. Glass;Karen Sachs;Daniel Burke;Zoey Zhou;John Wawrzynek;Wing H. Wong;Garry P. Nolan

  • Affiliations:
  • Stanford University, Stanford, CA;University of California, Berkeley, CA;University of California, Berkeley, CA;Electrical Engineering Department, Stanford University, Stanford, CA, USA 94305;Microbiology and Immunology Department, Stanford University, Stanford, CA, USA 94305;Electrical Engineering and Computer Sciences Department, University of California, Berkeley, CA, USA 94720;Electrical Engineering Department, Stanford University, Stanford, CA , USA 94305;University of California, Berkeley, CA;Stanford University, Stanford, CA;Stanford University, Stanford, CA

  • Venue:
  • Proceedings of the 24th ACM International Conference on Supercomputing
  • Year:
  • 2010

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Abstract

ParaLearn is a scalable, parallel FPGA-based system for learning interaction networks using Bayesian statistics. ParaLearn includes problem specific parallel/scalable algorithms, system software and hardware architecture to address this complex problem. Learning interaction networks from data uncovers causal relationships and allows scientists to predict and explain a system's behavior. Interaction networks have applications in many fields, though we will discuss them particularly in the field of personalized medicine where state of the art high-throughput experiments generate extensive data on gene expression, DNA sequencing and protein abundance. In this paper we demonstrate how ParaLearn models Signaling Networks in human T-Cells. We show greater than 2000 fold speedup on a Field Programmable Gate Array when compared to a baseline conventional implementation on a General Purpose Processor (GPP), a 2.38 fold speedup compared to a heavily optimized parallel GPP implementation, and between 2.74 and 6.15 fold power savings over the optimized GPP. Through using current generation FPGA technology and caching optimizations, we further project speedups of up to 8.15 fold, relative to the optimized GPP. Compared to software approaches, ParaLearn is faster, more power efficient, and can support novel learning algorithms that substantially improve the precision and robustness of the results.