A hardware-in-the-loop simulation environment for real-time systems development and architecture evaluation

  • Authors:

  • Vasily V. Balashov;Anatoly G. Bakhmurov;Maxim V. Chistolinov;Ruslan L. Smeliansky;Dmitry Y. Volkanov;Nikita V. Youshchenko

  • Affiliations:

  • Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia.;Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia.;Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia.;Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia.;Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia.;Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia

  • Venue:
  • International Journal of Critical Computer-Based Systems
  • Year:
  • 2010

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Abstract

In this paper, we present a technology for integration of distributed real-time embedded systems (RTES) based on hardware-in-the-loop simulation. The environment to support this technology is described. This environment also enables simulation-based development of RTES software and evaluation of RTES architecture on early stages of RTES development.