Multimedia IP architecture trends in the mobile multimedia consumer device

  • Authors:
  • J. Meehan;S. Busch;J. Noel;F. Noraz

  • Affiliations:
  • Texas Instruments Incorporated, 821 Avenue Jack Kilby-BP 5, 06271 Villeneuve-Loubet, France;Texas Instruments Incorporated, 821 Avenue Jack Kilby-BP 5, 06271 Villeneuve-Loubet, France;Texas Instruments Incorporated, 821 Avenue Jack Kilby-BP 5, 06271 Villeneuve-Loubet, France;Texas Instruments Incorporated, 821 Avenue Jack Kilby-BP 5, 06271 Villeneuve-Loubet, France

  • Venue:
  • Image Communication
  • Year:
  • 2010

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Abstract

A dedicated media processor is used in many mobile consumer devices to accelerate video, image, graphics, and display processing. Increased demand for higher pixel resolution, higher quality image and video processing, more graphics performance necessitates dramatically increased signal processing capabilities. To provide the increased performance at acceptable cost and power requires redesign of the traditional architecture. By wisely partitioning algorithms across programmable and fixed-function blocks, the performance goals can be met while still maintaining flexibility for new feature requirements and new standards. For a better than acceptable user experience and playback time, all IPs (display, graphics, video, and imaging) have to be optimized as an ''end to end'' system. In this paper, an overview of the future trends of multimedia IP processor architectures is provided that describes the implications on system architecture, power, and performance.