A Component-Based Design Environment for ESL Design
IEEE Design & Test
Multimedia IP architecture trends in the mobile multimedia consumer device
Image Communication
A synergetic operating unit on NoC layer for CMP system
International Journal of High Performance Systems Architecture
Diet SODA: a power-efficient processor for digital cameras
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
A distributed architecture model for heterogeneous multiprocessor system-on-chip design
ICESS'04 Proceedings of the First international conference on Embedded Software and Systems
| Hi-index | 0.01 |
Using a dual-core architecture integrated with several programmable coprocessors and dedicated functional blocks, the DM310 can provide high performance on imaging, video, and audio algorithms at low power and low system cost.