Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
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This paper presents a low power quadrature voltage-controlled oscillator (QVCO) with wide-tuning range. The topology of this QVCO is composed of differential Colpitts structure and back-gate coupling. The use of back-gate coupling reduces the power consumption and removes the additional noise contributions compared to conventional coupling transistor. This QVCO is designed in TSMC 0.18 µm CMOS process to cover the tuning band of 3.16-4.41GHz. With 1V voltage supply, the simulated power dissipation of the QVCO is 2.89 mW. The simulated phase noise at 1-MHz offset frequency is -108.52 dBc/Hz for 3.85 GHz.