Compact method for modeling and simulation of memristor devices: ion conductor chalcogenide-based memristor devices

  • Authors:
  • Robinson E. Pino;James W. Bohl;Nathan McDonald;Bryant Wysocki;Peter Rozwood;Kristy A. Campbell;Antonio Oblea;Achyut Timilsina

  • Affiliations:
  • IEEE and Advanced Computing Architectures, Rome, NY;Advanced Computing Architectures, Rome, NY;Advanced Computing Architectures, Rome, NY;Advanced Computing Architectures, Rome, NY;Advanced Computing Architectures, Rome, NY;IEEE and Boise State University, Boise, ID;Boise State University, Boise, ID;Boise State University, Boise, ID

  • Venue:
  • Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures
  • Year:
  • 2010

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Abstract

A compact model and simulation methodology for chalcogenide based memristor devices is proposed. From a microprocessor design view point, it is important to be able to simulate large numbers of devices within the integrated circuit architecture in order to speed up reliably the development process. Ideally, device models would accurately describe the characteristic device behavior and would be represented by single-valued equations without requiring the need for recursive or numerically intensive solutions. With this in mind, we have developed an empirical chalcogenide compact memristor model that accurately describes all regions of operations of memristor devices employing single-valued equations.