Power-aware BTB for modern processors

Authors:
Kaveh Jokar Deris;Amirali Baniasadi
Affiliations:
Electrical and Computer Engineering Department, University of Victoria, Victoria, Canada;Electrical and Computer Engineering Department, University of Victoria, Victoria, Canada
Venue:
Computers and Electrical Engineering
Year:
2010

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Abstract

Modern processors access the branch target buffer (BTB) every cycle to speculate branch target addresses. This aggressive approach improves performance as it results in early identification of target addresses. However, unfortunately, such accesses, quite often, are unnecessary as there is no control flow instruction among those fetched. In this work, we introduce speculative BTB access to address this design inefficiency. Our technique relies on a simple power efficient structure, referred to as the BLC-filter, to identify cycles where there is no control flow instruction among those fetched, at least one cycle in advance. By identifying such cycles and eliminating unnecessary BTB accesses we reduce BTB power dissipation (and therefore power density).