Dynamic Power Management on LDPC Decoders

  • Authors:
  • Erick Amador;Raymond Knopp;Vincent Rezard;Renaud Pacalet

  • Affiliations:
  • -;-;-;-

  • Venue:
  • ISVLSI '10 Proceedings of the 2010 IEEE Annual Symposium on VLSI
  • Year:
  • 2010

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Abstract

This paper presents a dynamic power management strategy for the iterative decoding of low-density parity-check (LDPC) codes. We propose an online algorithm for adjusting the operation of a power manageable decoder. Decision making is based upon the monitoring of a convergence metric independent from the message computation kernel. Furthermore we analyze the feasibility of a VLSI implementation for such algorithm. Up to 54% savings in energy were achieved with a relatively low loss on error-correcting performance.