Low-power DSP circuit design using bit-level pipelined maximally-parallel architectures

  • Authors:
  • Phillip J. Duncan;Shobana Swamy;Rajeev Jain

  • Affiliations:
  • -;-;-

  • Venue:
  • Proceedings of the 1993 symposium on Research on integrated systems
  • Year:
  • 1993

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Abstract