Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
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A fully differential high speed and highly linear CMOS Track-and-Hold amplifier (THA) that was used in front end of an Pipline ADC is described here. The architecture of Track-and-Hold based on an open-loop architecture with Miller hold capacitance. The Track-and-Hold circuit consists of an op-amp with low impedance nodes and properly voltage gain and bootstrapped switches. Designed circuit is simulated in a standard 0.35 um CMOS technology, the THA achieves -75.7 dB THD (Total Harmonic Distortion) for 1.6 Vp-p, 86 MHz input at 320 MHz sampling rate. The circuit design of major building blocks is described in details.